Liquid crystal displays have characteristics that they are thin and that they require low power consumption. Making use of these characteristics leads to wide use of liquid crystal display devices, liquid crystal displays have conventionally been used in a wide range as displays of the whole devices which are not limited to common devices, such as television sets and personal computers, but include measurement hardware, medical equipment and industrial equipment. As the liquid crystal display device, an active matrix drive liquid crystal display device is known in which a TFT (thin film transistor) is provided for each pixel, that is the minimum unit for displaying an image, so as to allow a fine image to be displayed.
The active matrix drive liquid crystal display device comprises an active matrix substrate on which a plurality of TFTs mentioned above are provided, a counter substrate which is disposed to face the active matrix substrate and on which a common electrode and the like are formed, and a liquid crystal layer provided between the active matrix substrate and the counter substrate.
FIG. 17 is a plan view schematically showing part of a conventional active matrix substrate.
In the active matrix substrate, as shown in FIG. 17, a plurality of source lines 100 extending in parallel to one another and a plurality of gate lines 101 extending in parallel to one another are provided to intersect. On the active matrix substrate, each TFT 102 is provided near the corresponding intersection of the source line 100 and the gate line 101, and a plurality of pixel electrodes 104 (shown in a transmission form) which are electrically connected to the corresponding TFT 102 through contact holes 103 formed in an insulating film (not shown) covering the TFTs 102 is formed in a matrix form.
Further, on the active matrix substrate, a plurality of auxiliary capacitance lines 105 are provided to each extend between the gate lines 101. Provided on each auxiliary capacitance line 105 are a plurality of auxiliary capacitance electrodes 107 formed to be integrated with drain electrodes 106 of the corresponding TFTs 102, and auxiliary capacitances for holding potentials written in the corresponding pixel electrodes 104 are formed between the auxiliary capacitance line 105 and the auxiliary capacitance electrodes 107 which overlap each other.
FIG. 18 shows a relationship among signal patterns which are applied to a gate line, a source line and a pixel electrode, respectively. As shown in FIG. 18, when a potential Vgh is applied to a gate line, a TFT connected to the gate line is turned on, and a potential Vs which has been applied to a source line connected to the TFT is applied via a drain electrode to a pixel electrode. At this point, writing is performed until a potential VP0 of the pixel electrode reaches the same as the potential Vs of the source line. When a potential Vgl is applied to the gate line, the potential of the pixel electrode drops, which results in a difference ΔVgd from the potential VP0 upon completion of the writing. The difference ΔVgd resulting from the drop of the potential of the pixel electrode is generated by a parasitic capacitance between a drain electrode and a gate electrode in each pixel, and is called a feedthrough voltage. In cases where the feedthrough voltage ΔVgd varies from one pixel to another, display defects, such as brightness unevenness and flicker, are likely to be visually recognized.
The feedthrough voltage ΔVgd is simply expressed by the following equation. Note that Vgpp represents a difference between Vgh and Vgl (Vgh-Vgl), Cgd represents a parasitic capacitance between a gate electrode and a drain electrode, Cs represents an auxiliary capacitance, and Clc represents a liquid crystal capacitance.ΔVgd=Vgpp×Cgd/(Clc+Cs+Cgd)
In recent years, as upsizing of display screens of television sets and the like have been demanded, the sizes of active matrix substrates have become larger. To manufacture an active matrix substrate, pattern formation is usually performed using photolithography to form lines and electrodes. In photolithography at the time of manufacturing a large-sized active matrix substrate, performed as an exposure process in which a resist applied onto a glass substrate is exposed through a photomask is an exposure process of a step-division exposure method. In the exposure process of this method, a photomask smaller than a glass substrate is disposed on the glass substrate, and exposure is performed in a divided manner using a plurality of shots while the glass substrate is moved stepwise and the photomask is replaced as necessary.
In the exposure process of the step-division exposure method, a resist on a glass substrate is exposed in a divided manner using a plurality of shots, and therefore exposure with relatively high alignment accuracy is required among a plurality of blocks defined for the corresponding areas on the glass substrate which are exposed in the shots. If an alignment error of an exposure device occurs in each block, arrangement relationships among lines, electrodes and a semiconductor layer and the like differ from one block to another, and therefore the parasitic capacitance Cgd, which is determined by the overlapping area of the gate electrode and the drain electrode, differs from one block to another. As a result, there is a difference in feedthrough voltage from one block to another, which makes it easy for brightness irregularities among blocks to be visually recognized on a display screen.
In a liquid crystal display device disclosed in PATENT DOCUMENT 1, widths of portions of a semiconductor layer in a TFT and a drain electrode overlapping the semiconductor layer which cross an end of a gate electrode are made smaller than the width of the drain electrode which is a channel width of the TFT. This can decrease the difference among blocks in the overlapping area between the gate electrode and the drain electrode which is caused by an alignment error in a direction perpendicular to the channel width.